成人免费一级片_国产一区导航_av资源在线免费观看_91黄色免费视频_亚洲欧美日韩色_91国产精品一区


曙海教育集團(tuán)論壇FPGA專區(qū)FPGA初中級(jí) → FPGA 時(shí)鐘問題


  共有11135人關(guān)注過本帖樹形打印

主題:FPGA 時(shí)鐘問題

美女呀,離線,留言給我吧!
wangxinxin
  1樓 個(gè)性首頁 | 博客 | 信息 | 搜索 | 郵箱 | 主頁 | UC


加好友 發(fā)短信
等級(jí):青蜂俠 帖子:1393 積分:14038 威望:0 精華:0 注冊:2010-11-12 11:08:23
FPGA 時(shí)鐘問題  發(fā)帖心情 Post By:2010-12-19 14:00:46

剛學(xué)不久~

我要做24H製的時(shí)鐘~但我一直DEBUG~一直用不出來~

Xilinx ISE 8.2i軟體~

請會(huì)的人幫我看一下哪出錯(cuò)了~謝



library IEEE;

use IEEE.STD_LOGIC_1164.ALL;

use IEEE.STD_LOGIC_ARITH.ALL;

use IEEE.STD_LOGIC_UNSIGNED.ALL;


---- Uncomment the following library declaration if instantiating

---- any Xilinx primitives in this code.

--library UNISIM;

--use UNISIM.VComponents.all;


entity CLOCK_00_60 is

    Port ( CLK : in  STD_LOGIC;

           RESET : in  STD_LOGIC;

           ENABLE : out  STD_LOGIC_VECTOR (6 downto 0);

           SEGMENT : out  STD_LOGIC_VECTOR (6 downto 0));

end CLOCK_00_60;


architecture Behavioral of CLOCK_00_60 is

signal SCAN_CLK :STD_LOGIC;

signal COUNT_CLK :STD_LOGIC;

signal DECODE_BCD :STD_LOGIC_VECTOR (3 downto 0);

signal mineable :STD_LOGIC;

signal hreable :STD_LOGIC;

signal POSITION:STD_LOGIC_VECTOR (6 downto 0);

signal DIVIDER:STD_LOGIC_VECTOR (29 downto 1);

signal COUNT_BCD:STD_LOGIC_VECTOR (23 downto 0);


begin

-------------------------------------------------

process (CLK,RESET)

begin

if RESET = '0' then

 DIVIDER <= ( others => '0');

elsif CLK' event and CLK = '1' then

 DIVIDER <= DIVIDER + 1 ;

end if;

end process;

COUNT_CLK<=DIVIDER(24);

SCAN_CLK<=DIVIDER(15);

------------------------------------------------秒

process(RESET,SCAN_CLK)

begin

if RESET = '0' then

 COUNT_BCD <= ( others => '0');

elsif SCAN_CLK' event and SCAN_CLK = '1' then

 if   COUNT_BCD(3 downto 0)= x"9" then

    COUNT_BCD(3 downto 0)<= x"0";

    COUNT_BCD(7 downto 4)<= COUNT_BCD(7 downto 4)+1;

 else

   COUNT_BCD(3 downto 0)<= COUNT_BCD(3 downto 0)+1;

 end if;

end if;

end process;

mineable <= '1' when COUNT_BCD(7 downto 0) = x"59" else '0';

----------------------------------------------------------分


process(RESET,SCAN_CLK)

begin

if RESET = '0' then

 COUNT_BCD <= ( others => '0');

 if mineable = '1' then

elsif SCAN_CLK' event and SCAN_CLK = '1' then

 if   COUNT_BCD(11 downto 8)= x"9" then

    COUNT_BCD(11 downto 8)<= x"0";

    COUNT_BCD(15 downto 12)<= COUNT_BCD(15 downto 12)+1;

 else

   COUNT_BCD(11 downto 8)<= COUNT_BCD(11 downto 8)+1;

 end if;

end if;

end if;

end process;

hreable <= '1' when COUNT_BCD(15 downto 8) = x"59" else '0';

-------------------------------------------------------------時(shí)

process(RESET,SCAN_CLK)

begin

if RESET = '0' then

 COUNT_BCD <= ( others => '0');

  if mineable = '1' and hreable = '1' then

elsif SCAN_CLK' event and SCAN_CLK = '1' then

 if   COUNT_BCD(19 downto 16)= x"9" then

    COUNT_BCD(19 downto 16)<= x"0";

    COUNT_BCD(23 downto 20)<= COUNT_BCD(23 downto 20)+1;

  if   COUNT_BCD(19 downto 16)= x"2" then

   COUNT_BCD(23 downto 20)<= x"0";

 else

   COUNT_BCD(19 downto 16)<= COUNT_BCD(19 downto 16)+1;

  end if;

 end if;

  end if;

end if;

end process;



process(RESET,SCAN_CLK)

begin

if RESET = '0' then

 POSITION <= "1111110";

elsif SCAN_CLK' event and SCAN_CLK = '1' then

 POSITION<="111111"&POSITION(0);

end if;

end process;

ENABLE<=POSITION;

-----------------------------------------------------------

process(POSITION,SCAN_CLK)

begin

case POSITION is

 when "1111110" => DECODE_BCD <=COUNT_BCD(3 downto 0);    --秒

 when "1111101" => DECODE_BCD <=COUNT_BCD(7 downto 4);    --秒

 when "1111011" => DECODE_BCD <=COUNT_BCD(11 downto 8);   --分

 when "1110111" => DECODE_BCD <=COUNT_BCD(15 downto 12);   --分

   when "1101111" => DECODE_BCD <=COUNT_BCD(19 downto 16);   --時(shí)

   when "1011111" => DECODE_BCD <=COUNT_BCD(23 downto 20);   --時(shí)

 when others => null;

end case;

end process;

 

with DECODE_BCD Select

SEGMENT<= "1000000" when X"0",

  "1111001" when X"1",

  "0100100" when X"2",

  "0110000" when X"3",

  "0011001" when X"4",

  "0010010" when X"5",

  "0000010" when X"6",

  "1111000" when X"7",

  "0000000" when X"8",

  "0010000" when X"9",

  "1111111" when others;


end Behavioral;

支持(0中立(0反對(0單帖管理 | 引用 | 回復(fù) 回到頂部
總數(shù) 20 1 2 下一頁

返回版面帖子列表

FPGA 時(shí)鐘問題








簽名
主站蜘蛛池模板: 40一50一60老女人毛片 | 日韩中文字幕在线观看 | beeg欧美| 日韩精品视频在线看 | 欧美a级在线 | 精品一区二区三区免费 | 超碰黑人| 97超碰站| av一本| 免费观看成人 | 亚洲免费久久 | 欧美日韩一本 | 日韩免费视频一区 | 超碰人人91| 国产微拍一区 | 一级做a爱片久久 | 黄色草逼视频 | 日韩在线视频第一页 | 久久久久久成人 | 欧美一极片 | 迪迦奥特曼中文版 | 在线黄色av网站 | 窝窝午夜影院 | 亚洲一区二区三区视频在线 | 欧美日韩国产片 | 国产一区二区三区视频在线观看 | 成年人午夜 | 亚洲精品二区 | 亚洲欧洲综合 | 日韩欧美在线中文字幕 | 在线观看污视频 | 四虎永久免费在线观看 | 免费观看的毛片 | 91中文字幕在线 | 日本一级黄色 | 欧美人成在线 | 日韩成人一区 | 日日爽爽| 97视频网站 | 亚洲免费资源 | 日韩欧美国产一区二区三区 |